SNZREQEN12=0, SNZREQEN6=0, SNZREQEN5=0, SNZREQEN4=0, SNZREQEN3=0, SNZREQEN2=0, SNZREQEN8=0, SNZREQEN25=0, SNZREQEN9=0, SNZREQEN11=0, SNZREQEN1=0, SNZREQEN0=0, SNZREQEN10=0, SNZREQEN24=0, SNZREQEN15=0, SNZREQEN14=0, SNZREQEN30=0, SNZREQEN17=0, SNZREQEN7=0, SNZREQEN28=0, SNZREQEN23=0, SNZREQEN29=0
Snooze Request Control Register
SNZREQEN0 | Snooze Request Enable 0 Enable IRQ0 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN1 | Snooze Request Enable 1 Enable IRQ1 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN2 | Snooze Request Enable 2 Enable IRQ2 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN3 | Snooze Request Enable 3 Enable IRQ3 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN4 | Snooze Request Enable 4 Enable IRQ4 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN5 | Snooze Request Enable 5 Enable IRQ5 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN6 | Snooze Request Enable 6 Enable IRQ6 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN7 | Snooze Request Enable 7 Enable IRQ7 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN8 | Snooze Request Enable 8 Enable IRQ8 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN9 | Snooze Request Enable 9 Enable IRQ9 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN10 | Snooze Request Enable 10 Enable IRQ10 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN11 | Snooze Request Enable 11 Enable IRQ11 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN12 | Snooze Request Enable 12 Enable IRQ12 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
Reserved | This bit is read as 0. The write value should be 0. |
SNZREQEN14 | Snooze Request Enable 14 Enable IRQ14 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN15 | Snooze Request Enable 15 Enable IRQ15 pin snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
Reserved | This bit is read as 0. The write value should be 0. |
SNZREQEN17 | Snooze Request Enable 17 Enable KINT snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
Reserved | These bits are read as 00000. The write value should be 00000. |
SNZREQEN23 | Snooze Request Enable 23 Enable RTC alarm snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN24 | Snooze Request Enable 24 Enable RTC alarm snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN25 | Snooze Request Enable 25 Enable RTC period snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
Reserved | These bits are read as 00. The write value should be 00. |
SNZREQEN28 | Snooze Request Enable 28 Enable AGT1 underflow snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN29 | Snooze Request Enable 29 Enable AGT1 compare match A snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
SNZREQEN30 | Snooze Request Enable 30 Enable AGT1 compare match B snooze request 0 (0): Disable snooze request 1 (1): Enable snooze request |
Reserved | This bit is read as 0. The write value should be 0. |